june 2009 FDD6796 n-channel powertrench ? mosfet ?2009 fairchild semiconductor corporation FDD6796 rev.c1 www.fairchildsemi.com 1 FDD6796 n-channel powertrench ? mosfet 25 v, 40 a, 5.7 m ? features ? max r ds(on) = 5.7 m ? at v gs = 10 v, i d = 20 a ? max r ds(on) = 9.0 m ? at v gs = 4.5 v, i d = 15.5 a ? 100% uil tested ? rohs compliant general description this n-channel mosfet has been designed specifically to improve the overall efficiency of dc/dc converters using either synchronous or conventional swit ching pwm controllers. it has been optimized for low gate charge, low r ds(on) and fast switching speed. applications ? vcore dc-dc for desktop computers and servers ? vrm for intermediate bus architecture g s d to-252 d-pak ( to-252 ) d g s mosfet maximum ratings t c = 25 c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 25 v v gs gate to source voltage 20 v i d drain current -continuous (package limited) t c = 25 c 40 a -continuous (silicon limited) t c = 25 c 69 -continuous t a = 25 c (note 1a) 20 -pulsed 100 e as single pulse avalanche energy (note 3) 84 mj p d power dissipation t c = 25 c 42 w power dissipation t a = 25 c (note 1a) 3.7 t j , t stg operating and storage junction temperature range -55 to +175 c r jc thermal resistance, junction to case 3.5 c/w r ja thermal resistance, junction to ambient (note 1a) 40 device marking device package reel size tape width quantity FDD6796 FDD6796 d-pak (to-252) 13 ?? 12 mm 2500 units
FDD6796 n-channel powertrench ? mosfet ?2009 fairchild semiconductor corporation FDD6796 rev.c1 www.fairchildsemi.com 2 electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v 25 v ? bv dss ? t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 6.1 mv/c i dss zero gate voltage drain current v ds = 20 v, v gs = 0 v 1 a i gss gate to source leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 a 1.0 1.9 3.0 v ? v gs(th) ? t j gate to source threshold voltage temperature coefficient i d = 250 a, referenced to 25 c -6.6 mv/c r ds(on) static drain to source on resistance v gs = 10 v , i d = 20 a 4.6 5.7 m ? v gs = 4.5 v, i d = 15.5 a 6.6 9.0 v gs = 10 v, i d = 20 a, t j = 150 c 6.8 8.5 g fs forward transconductance v ds = 5 v, i d = 20 a 138 s c iss input capacitance v ds = 13 v, v gs = 0 v, f = 1 mhz 1740 2315 pf c oss output capacitance 325 430 pf c rss reverse transfer capacitance 290 435 pf r g gate resistance 0.8 1.6 ? t d(on) turn-on delay time v dd = 13 v, i d = 20 a, v gs = 10 v, r gen = 6 ? 10 19 ns t r rise time 611ns t d(off) turn-off delay time 23 37 ns t f fall time 410ns q g total gate charge v gs = 0 v to 10 v v dd = 13 v, i d = 20 a 29 41 nc q g total gate charge v gs = 0 v to 4.5 v 15 21 q gs gate to source charge 4.9 nc q gd gate to drain ?miller? charge 6.2 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 3.1 a (note 2) 0.8 1.2 v v gs = 0 v, i s = 20 a (note 2) 0.9 1.3 t rr reverse recovery time i f = 20 a, di/dt = 100 a/ s 15 26 ns q rr reverse recovery charge 3 10 nc 40 c/w when mounted on a 1 in 2 pad of 2 oz copper 96 c/w when mounted on a minimum pad a) b) notes : 1: r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the s older mounting surface of the drain pins. r jc is guaranteed by design while r ja is determined by the user?s board design. 2: pulse test: pulse width < 300 s, duty cycle < 2.0%. 3: e as of 84 mj is based on starting t j = 25 c, l = 1 mh, i as = 13 a, v dd = 23 v, v gs = 10 v. 100% test at l = 0.1 mh, i as = 28 a.
FDD6796 n-channel powertrench ? mosfet ?2009 fairchild semiconductor corporation FDD6796 rev.c1 www.fairchildsemi.com 3 typical characteristics t j = 25 c unless otherwise noted figure 1. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 0 20 40 60 80 100 v gs = 3.5 v v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 4 v v gs = 3 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics figure 2. 020406080100 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 v gs = 3.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4 v v gs = 4.5 v v gs = 3 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 175 0.6 0.8 1.0 1.2 1.4 1.6 i d = 20 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 246810 0 5 10 15 20 t j = 150 o c i d = 20 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 012345 0 20 40 60 80 100 t j = 175 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 175 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
FDD6796 n-channel powertrench ? mosfet ?2009 fairchild semiconductor corporation FDD6796 rev.c1 www.fairchildsemi.com 4 figure 7. 0 5 10 15 20 25 30 0 2 4 6 8 10 i d = 20 a v dd = 16 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 13 v gate charge characteristics figure 8. 0.1 1 10 100 1000 50 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss 30 5000 c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1 10 100 t j = 25 o c t j = 150 o c t av , time in avalanche (ms) i as , avalanche current (a) 40 u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 175 0 10 20 30 40 50 60 70 v gs = 4.5 v limited by package r t jc = 3.5 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e operating area 0.1 1 10 100 0.1 1 10 100 dc 100 ms 10 ms 1 ms 100 us i d , drain current (a) v ds , drain to source voltage (v) 200 this area is limited by r ds(on) single pulse t j = max rated r t jc = 3.5 o c/w t c = 25 o c figure 12. 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 1 10 1 10 2 10 3 10 4 10 5 single pulse r t jc = 3.5 o c/w t c = 25 o c v gs = 10 v p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25 c unless otherwise noted
FDD6796 n-channel powertrench ? mosfet ?2009 fairchild semiconductor corporation FDD6796 rev.c1 www.fairchildsemi.com 5 figure 13. junction-to-case transient thermal response curve 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1 1 0.001 0.01 0.1 1 single pulse r t jc = 3.5 o c/w duty cycle-descending order normalized thermal impedance, z t jc t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t jc x r t jc + t c figure 14. 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 0.001 0.01 0.1 1 single pulse r t ja = 96 o c/w ( note 1b ) duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25 c unless otherwise noted
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